An event counter is a unit that counts occurrences of a certain condition. They may be used for statistical counts, debugging and performance characterization. The information attained from event counters is used in computing systems to, for example, resolve performance bottlenecks and fine-tune configurable parameters. Event counters are also used to trigger actions in computers. For example, when an event counter reaches a certain threshold, it could be used to generate an interrupt.
Managing and controlling high-speed systems can involve precise, simultaneous counts of hundreds of conditions that generate billions of events in a short period of time. Counting such large numbers of events entails a correspondingly large number of high-volume counters (e.g., 64-bit counters). However, hundreds of large counters occupy a significant amount of space in an integrated circuit (e.g., an application-specific integrated circuit (IC)). In the case of a field-programmable gate array (FPGA) devices, where there are limited numbers of logic building blocks (e.g., Look-Up Tables, or LUTs), the hundreds of counters consume a very significant number of the logic blocks.
An event counter may use a combination of a pre-counters and a single random access memory (RAM), wherein a state machine sweeps serially through the pre-counters and adds their contents to a corresponding value in RAM. In such event counters, the width of each pre-counter must be large enough that, when counting events in a high-speed system, the pre-counter will not overflow between sweeps of the state machine. That is, if counts accumulate in the pre-counters faster than they are moved into the RAM, the count information will overflow the pre-counters. As such the pre-counters must include a large number of registers to ensure that no information is lost. In an event counter that tracks a large number of events, this system may demand a large amount of space in an IC due to the size of the pre-counters.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.